My First Vector Program
Below is a step by step guide to writing your first RISC-V RVV 0.7.1 C program and running it on the EPCC RISC-V testbed. It is assumed that you are familiar with the vim editor and the C programming language.
My First C Assembly Hybrid Vector Program
Following on from part 1, next up we look at combining C and RISC-V assembly in your second RISC-V RVV 0.7.1 program and running it on the EPCC RISC-V testbed. It is assumed that you are familiar with the vim editor, the C programming language and some RISC-V assembly language.
Setting up the RISC-V gcc toolchain
You may find that your work flow is aided by setting up the RISC-V gcc Toolchain on your local non-RISC-V computer to enable you to build (and catch compile time errors) locally. This is based on an AMD x64 system running Ubuntu 24.04.
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Setting up SPIKE - the RISC-V ISA Simulator
SPIKE is the RISC-V ISA Simulator. It can be used to run simple test programs with out the need to boot in to a QEMU RISC-V instance or have access to RISC-V hardware. Please note that runtimes will be slower than running on real RISC-V hardware especially for features such as RVV Vector extensions, so, any benchmarking must be done on real RISC-V hardware.
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