Important dates
- Paper Deadline (extended): 8th November 2025 (AoE)
- Author Notification: 26th November 2025
- Camera ready papers: TBD
- Workshop: TBD (26-29 of January 2026)
Logistics
Co-located with HPC Asia 2026, this workshop will run in Osaka, Japan.
Location: Osaka International Convention Center
Workshop details
The goal of this workshop is to continue building the community of RISC-V in HPC, sharing the benefits of this technology with domain scientists, tool developers, and supercomputer operators. RISC-V is an open standard Instruction Set Architecture (ISA) which enables the royalty free development of CPUs and a common software ecosystem to be shared across them. Following this community driven ISA standard, a very diverse set of CPUs have been, and continue to be, developed which are suited to a range of workloads. Whilst RISC-V has become very popular already in some fields, and in 2022 the ten billionth RISC-V core was shipped, to date it has yet to gain traction in HPC.
Call for papers - workshop topics
We invite submissions of high-quality, original research results and works-in-progress on RISC-V with a general connection to HPC. Topics of interest for this workshop include (but are not limited to):
- Example use-cases and case-studies that use RISC-V
- Lessons learnt from leveraging RISC-V in HPC
- Industry papers exploring the use of RISC-V
- The porting of codes to RISC-V
- Novel hardware and accelerators built upon RISC-V
- Tools and techniques to aid in the use of RISC-V for HPC
- Developments in HPC libraries to port them to RISC-V
- Enhancements to RISC-V to make the architecture more suited for HPC
- Compiler and runtime support for RISC-V
- The RISC-V ecosystem
- Future gazing how RISC-V might evolve the HPC community
- And anything else related to RISC-V and HPC!
Paper submission
TBD
Organisation
Organising committee
- Nick Brown (EPCC at the University of Edinburgh)
- Enrique S. Quintana-Ortí (Universitat Politècnica de València)
- Sandra Catalán (Universitat Jaume I)
Program committee
TBD
Workshop Schedule
TBD
Abstracts
TBD